An Advanced Packaging Active Interposer is an interposer with active functionalities, designed for advanced packaging technologies. Unlike traditional passive interposers (such as silicon interposers), an Active Interposer integrates active components like drivers, buffers, power management units (PMU), and signal conditioning circuits.
Provide OEM/ODM services
Design
Simulation
Production
Testing
Reliability
Analysis
Technical Specifications
Wafer technology :
Qualification for 22 and 16nm wafer
Ball pitch:
300um
Ball size:
150um ball drop
Grinding:
Die thickness 80~150um
Plated RDL line/width:
10/10um; 8/8um
Plated RDL thickness:
>=7um
Chiplets & Heterogeneous Integration
A chiplet is a physically realized and tested (hardened) IP with a standard communication interface manufactured in a silicon wafer to reduce cost by increasing the manufacturing yield and reusability across applications.
Features and Advantages
Improved Signal Transmission
Reduces signal loss and crosstalk for better high-frequency performance
Efficient Power Management
Integrates PMU or voltage regulators to enhance power efficiency
Lower Power Consumption
Minimizes transmission power loss and latency
Higher Integration
Supports heterogeneous integration of AI/HPC chips, memory, and other components
Advanced Packaging Compatibility
Works with 2.5D/3D packaging technologies like CoWoS, Foveros, and SoIC